AMBA Protocol for ALU

The proposed project implementation is on AMBA IO System. The bus interface used in the project is AXI Interface Bus. Master and Slave interfaces will be developed according to the proposed AMBA design. The description of the AMBA protocol and various blocks are mentioned below. The Advanced Microcontroller Bus Architecture (AMBA) specification defines an on-chip communications standard for designing highperformance embedded microcontrollers AXI acts as the high-performance system back bone bus. AXI supports the efficient connection of processors, on-chip memories and off-chip outer memory interfaces with low-power peripheral macro cell functions. is also specified to ensure ease of use in an efficient design flow using synthesis and automated test techniques. Memory devices such as SRAM, ROM and FIFO are used as Slave devices and Processor Control Designs are used as master devices for AMBA IO System. The intercommunication will be performed using AMBA Bus with Arbiter. We can have Single Master Single Slave design as well as Multiple Master Multiple Slave devices as per user requirements. The design is implemented using Verilog HDL language. The verification of the design is done using Verilog Test bench. Verification has become one of the time consuming task in design and verification cycle and hence takes up the major chunk of the resources. Since the serial communication protocols are preferred means of data communication, application of Verilog environment for the verification of AMBA IO System has tremendous implementation scope. For the designed AMBA IO system, it is tested automatically by reusable reliable layer verification platform.